1. Field of the Disclosure
The present disclosure relates to methods of generating transistor shapes and data processing system readable media to perform the methods, and more particularly to methods of generating planar double gate transistor shapes and data processing system readable media to perform the methods.
2. Description of the Related Art
Conventional integrated circuits (“ICs”) can include single or double gate transistors. Double gate transistors allow for better control of transistors and are currently being used more than they have in the past. Conventional software can generate a single gate transistor layout based on logic diagram or a circuit schematic. However, planar double gate transistors are typically manually generated. Many integrated circuits include a million, a billion or more transistors within a single integrated circuit. The process of manually generating the transistors or creating cell libraries to help design the double gate transistors can be costly and time consuming.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments.